Hi,
These days I am working with VHDL verification, and one of the important tasks are closing in on 100% code coverage. I use Riviera-Pro, and use the "acdb report -html" to browse and examine the coverage tree with an external web browser.
I realize that it would be a huge advantage if Sigasi could read the coverage database, and highlight code lines depending on coverage status in some way.
I hope that you would consider functionality similar to this, in a future release.