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Formatting VHDL code - new option

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hi have two things to suggest

1. the thing i want to say is,
no one can ever meet every coders needs, so adding a feature of "LOCK FORMATTING" (until designer "unlocks" it) will be extremely good and feasible.
so that, when i press CTRL + SHIFT + F it will format whole code, except the parts that i have "LOCKED"
(p.s. i know you can select the text and "CTRL + SHIFT + F" only that part, but that's not enough, from practice)

2.

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